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Preliminary Technical Data
AD7266
AD7266—SPECIFICATIONS
1
Table 1. T
A
= T
MIN
to T
MAX
, V
DD
= 2.7 V to 3.3 V, f
SCLK
= 25 MHz, f
S
= 1.5 MSPS, V
DRIVE
= 2.7 V to 3.3 V; V
DD
= 4.75 V to 5.25 V,
f
SCLK
= 32 MHz, f
S
= 2 MSPS, V
DRIVE
= 2.7 V to 5.25 V; Reference = 2.5 V ± 1%, unless otherwise noted
Parameter
Specification
DYNAMIC PERFORMANCE
Unit
Test Conditions/Comments
Signal-to-Noise + Distortion Ratio (SINAD)
2
Total Harmonic Distortion (THD)
2
Spurious Free Dynamic Range (SFDR)
2
Intermodulation Distortion (IMD)
2
Second Order Terms
Third Order Terms
Channel to Channel Isolation
SAMPLE AND HOLD
Aperture Delay
3
Aperture Jitter
3
Aperture Delay Matching
3
Full Power Bandwidth
DC ACCURACY
Resolution
Integral Nonlinearity
2
Differential Nonlinearity
2
0 V to V
REF
Input Range
Offset Error
Offset Error Match
Gain Error
Gain Error Match
0 V to 2 × V
REF
Input Range
Positive Gain Error
Zero Code Error
Zero Code Error Match
Negative Gain Error
ANALOG INPUT
Input Voltage Ranges
DC Leakage Current
Input Capactiance
REFERENCE INPUT/OUTPUT
Reference Output Voltage
4
Reference Input Voltage Range
DC Leakage Current
Input Capactiance
V
REF
Output Impedance
5
Reference Temperature Coefficient
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN3
70
–75
–76
–88
–88
–88
10
50
200
20
2.5
12
±1
±1.5
±0.95
±3
±0.5
±2
±0.6
±2
±3
±1
±1
0 V to V
REF
0 V to 2 x V
REF
±500
±1
30
10
2.49/2.51
0.1/2.5
±30
±160
20
25
25
10
2.8
0.4
±1
10
dB min
dB max
dB max
dB typ
dB typ
dB typ
ns max
ps typ
ps max
MHz typ
MHz typ
Bits
LSB max
LSB max
LSB max
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB max
LSB typ
LSB max
V
V
nA max
μA max
pF typ
pF typ
V min/V max
V min/V max
μA max
μA max
pF typ
typ
ppm/°C max
ppm/°C typ
V min
V max
μA max
pF max
f
IN
= 100 kHz sine wave
f
IN
= 100 kHz sine wave
f
IN
= 100 kHz sine wave
@ 3 dB
@0.1 dB
±0.5 LSB typ; differential configuration
±0.5 LSB typ; single-ended configuration
Guaranteed no missed codes to 12 bits
Straight binary output coding
Twos complement output coding
RANGE pin low upon CS falling edge
RANGE pin high upon CS falling edge
T
A
= –40°C to +85°C
85°C < T
A
≤ 125°C
When in track
When in hold
See Typical Performance plots
V
REF
pin
D
CAP
A, D
CAP
B pins
Typically 15 nA, V
IN
= 0 V or V
DRIVE
Rev. PrG | Page 3 of 17
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